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Patent appraised by patentsbase
$ 1000GLOBAL PATENTRANK
# 56.000ABSTRACT
A measurement test instrument voltage management system for an accessory device has a accessory device interface that provides a voltage to a memory device in the accessory device. A sensing signal is generated when the accessory device is connected to the interface that causes an interrupt signal to be coupled to a controller. The controller retrieves accessory device data stored in the device memory via the interface and determines if the connected accessory device is a valid device capable of being supported by the measurement test instrument and voltage power requirements for the accessory device. The controller generates an enable signal for a valid and supported device that is coupled to a voltage switching circuit. The voltage switching circuit generates at least a first output voltage based on the voltage power requirements that is coupled to the accessory device via the interface to provide power to the accessory device.
INFORMATION
DETAILED DESCRIPTION OF THE INVENTION
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
Referring to FIG. 1, there is shown a measurement test instrument , such as an oscilloscope, logic analyzer, spectrum analyzer, network analyzer or the like having a plug-in accessory device , such as a measurement probe, signal source, video camera, probe amplifier or the like. In the preferred embodiment, the measurement test instrument has a display device on which is displayed a signal, video picture or the like from a device under test. One or more accessory interfaces are provided in the measurement test instrument for connecting multiple accessory devices to the instrument. Generally, the measurement test instrument includes front panel controls , such as rotatable knobs, push buttons and the like for controlling the settings of the instrument. Alternatively, the front panel controls may be graphically generated and displayed on the display device and controllable by the user. Each accessory interface has a coaxial signal input line and a series of voltage power, clock, data, sensing and memory power lines as shown in greater detail in the representative block diagram of the measurement test instrument in FIG. .
The block diagram of FIG. 2 shows one or more accessory devices having the capability of being connected to one or more accessory interfaces of the measurement test instrument . The accessory devices have one-half of a signal input connector , such as a BNC connector, BMA connector or the like. The accessory device also has a memory device , such as a EPROM that contains accessory device specific data, such a device type, calibration factors, offset values, voltage power codes, voltage power ramping codes, current draw values and the like. The accessory device has connector pins or contacts that connect to corresponding contacts or pins in the accessory interface to couple signals and voltage power to and from the device.
The accessory interface has the other half of the signal input connector and the pins or connects for connecting to the accessory device. In the preferred embodiment of the invention, the accessory interface has gold plated pogo type pins that connect to contact pads in the accessory device . Each interface has a sensing line that is coupled to a sensing circuit . Each interface also has one or more voltage power lines that are coupled to corresponding voltage switching circuits that provide selectable voltage power to the accessory device . A voltage line is connected to each interface to provide a voltage to the memory devices of the connected device . Each interface further has clock/data lines coupled to the memory device for clocking out the data stored in the memory device. An interrupt line couples the sensing circuit to a controller . The clock/data lines from the accessory interfaces are also connected to the controller . Each voltage switching circuit is connected to the controller via an enable line .
The controller , such as CELERON™ or PENTIUM® microprocessor, manufactured and sold by Intel, Corp., Santa Clara, Calif., is coupled to memory via a system bus . The memory represents both RAM, ROM and cache memory with the RAM memory storing volatile data, such as voltage power codes and voltage power ramping codes from the accessory device, digital data samples of an input signal generated by an acquisition system (not shown), and the like. The system bus is also connected to the display device , such a liquid crystal display, cathode ray tube or the like, and to the front panel controls which may include control entry devices, such as a keyboard and/or mouse as well as knobs and buttons. A mass storage unit or units , such as a hard disk drive, CD ROM drive, tape drive, floppy drive or the like that reads from and/or writes to appropriate mass storage media, may also be connected to the system bus . Program instructions for controlling the measurement test instrument , implementing the voltage management system may be stored and accessed from the ROM memory or from the mass storage media of the mass storage unit . The measurement test instrument is preferably a PC based system controlled under WINDOWS® 98 operating system, manufactured and sold by Microsoft, Corp., Redmond, Wash. or similar types of operating systems. The controller in the above described measurement test instrument may also be implemented using multiple controllers and digital signal processing devices. For example, a second controller, such as a Power PC microprocessor manufactured and sold by Motorola, Inc., Schaumburg, Ill., may be included to control the acquisition and processing of an input data signal. The display device may be controlled by a display controller receiving display instructions from a main controller and receiving display data from a digital signal processing device. A bus controller may also be included to monitor the accessory interfaces for connected accessory devices , provide communications between the accessory interfaces , the sensing circuit and the controller .
The general operation of the measurement test instrument with the voltage management system starts with an accessory device being connected to one of the accessory interfaces. The accessory device connection causes a sensing signal to be generated on the sensing line that is coupled to the sensing circuit . The sensing circuit generates an interrupt signal on interrupt line in response to the sensing signal. The interrupt signal is coupled to the controller which processes the interrupt and generates, under program control, a clock signal that is coupled to the accessory device via the accessory interface . The clock signal clocks out the accessory device data stored from the memory to the controller . The accessory data includes accessory device identity information, and preferably voltage power codes that set the voltage power output levels for the voltage switching circuit . The accessory device data may also include voltage power ramping codes that vary the ramp-up times of the voltage levels of the voltage switching circuit. Alternately, the accessory device identity data may be used to access voltage power and ramp-up codes stored in ROM memory that are coupled to the voltage switching circuit . The advantage of storing the voltage power and voltage power ramping codes in the accessory device memory is that new accessory devices that may have different voltage and power-up requirements without having to modify the ROM memory in the host measurement test instrument.
The controller receives the accessory device data and determines from the data if the accessory device is a valid device and supported by the measurement test instrument . For example, if the accessory device implements an accessory feature that is not supported by the measurement test instrument or requires more current than is available from the instrument, the controller treats the device as an unsupported probe. The controller generates an enable signal in response to a valid and supported accessory device that is coupled to the voltage switching circuit via enable line . The controller also passes the voltage power codes to the voltage switching circuit via the system bus . The voltage switching circuit generates an output supply voltage or voltages defined by the voltage power code or codes via the voltage line or lines to power the accessory device . If an invalid or unsupported accessory device is connected to the accessory interface , the controller does not generate an enable message to the voltage switching circuit and power is not supplied to the accessory device . Additionally, the controller may also generate an error message that is displayed on the displayed device indicating that the connected device is an invalid or unsupported device.
Further, the data stored in the accessory device memory may include a current draw value indicating how much current the device will draw from the instrument power supply. Memory has maximum current draw values indicating the maximum amount of current any configuration of accessory devices may draw from the instrument power supply. The controller, operating under program control, sums the current draw values of the connected accessory devices and compare the summed value with the maximum current draw value. If the current draw value of the last connected accessory device makes the summed current draw values exceed the maximum current draw value, the controller does not generate the enable signal for the last connected device. The controller may also generate an error message that is displayed on the display device indicating the last connected accessory device is not powered due to excessive current draw on the power supply.
Removing the accessory device from the accessory interface removes the sensing signal on the sensing line , which causes an interrupt to be generated that is coupled to the controller via the interrupt line . The controller removes the enable signal on the enable line causing the voltage switching circuit to remove the voltage power to the interface .
Referring to FIG. 3, there is shown a more detailed block diagram of the measurement test instrument with the accessory device voltage management system illustrating the preferred embodiment of the present invention. Like elements from the previous drawing are labeled the same. Each accessory device has a memory device that receives a voltage supply via voltage line when the accessory device is connected to the accessory interface . Each device may have circuitry that receives voltage power from the voltage switching circuit associated with the accessory interface via voltage output lines . The voltage switching circuit provides selectable voltages to power the circuitry in the accessory device . Instrument ground is provided to each accessory devices via a ground line connected to each of the accessory interfaces . Each accessory device has a sensing output connection coupled to the sensing line . In the preferred embodiment of the invention, the sensing output connection is coupled to electrical ground which generates an active low output on the sensing line . Each interface has clock and data lines and , corresponding to clock/data line in FIG. 2, that are coupled to the memory device . To relieve the main controller from continually monitoring and communicating with the accessory interfaces and the sensing circuit , the data and clock lines and are coupled to a bus controller that generates a clock output signal on the clock line and receives data from the accessory device memory on the data line . The sensing circuit is connected to the bus controller via a three line communications bus , corresponding to interrupt line in FIG. 2, that includes an interrupt line, a clock line and a data line. The bus controller is coupled by another serial bus , such as an RS232 type bus having TTL logic levels, to a system controller . Alternately, the interrupt line from the sensing circuit may be coupled directly to the controller . The enable lines in the preferred embodiment are coupled from the sensing circuit to the voltage switching circuit . The system controller is coupled to the previously described peripheral device , , and via system bus .
Referring to FIG. 4, there is shown a representative schematic diagram of the sensing circuit , which in conjunction with FIGS. 3 and 5 will be used to describe the voltage management system in the measurement test instrument . Each accessory interface has a sensing line that is coupled to the sensing circuit . The sensing circuit sets each of the sensing lines to an active high state by applying a positive voltage to the lines via resistors . Excessive voltage protection for the lines is provided by diodes . Connecting an accessory device to the accessory interface couples the sensing line to the electrically grounded sensing output connection which generates an active low signal to the sensing circuit . Alternately, the sensing lines may be set to an active low state and the accessory device generates an active high signal by using the memory voltage supply. The sensing lines are coupled to an I/O expander integrated circuit , such as manufactured by Philips Semiconductor Products, Sunnyvale, Calif., under part number PCF8574A. The I/O expander provides remote I/O expansion for the bus controller via a two-line serial bidirectional bus of the communications bus having the clock and data lines. The expander also has an interrupt output which is connected to interrupt logic in the bus controller via the interrupt line of the communications bus . By sensing an interrupt signal on this line, the remote I/O expander can inform the bus controller that there is incoming data on its ports without having to communicate via the serial bidirectional bus.
As previously stated, connecting the accessory device to one of the accessory interfaces generates an active low signal on the sensing line which causes the I/O expander to generate an active low interrupt signal that is coupled to the bus controller via communications bus interrupt line . The controller or controller , if the sensing circuit interrupt line is coupled to that controller, in return polls the sensing lines to determine which line has been changed to the active low. The bus controller passes the sensing line information to the controller via serial bus . The controller in return instructs the bus controller to initiate a clock signal that is coupled to the connected accessory device via clock line . The clock signal clocks out the data stored in memory via data line to the bus controller which in turn couples the data to the controller via serial bus . The accessory device data is processed by the controller under the control of stored programs in memory to verify if the connected accessory device is valid and supported by the measurement test instrument . Once the processor has determined that the accessory device is valid and supported, it loads the appropriate voltage power code or codes passed from the accessory device memory into the voltage switching circuit and signals the bus controller to enable the voltage switching circuit connected to the accessory interface . The bus controller uses a stored protocol to clock data into the I/O expander via the clock and data lines of the communications bus to load values into a plurality of output latches with each output latch connected to one of the enable lines . The output latch of the active accessory interface connector provides an active low enable signal that is coupled to the voltage switching circuit connected to the active interface.
FIG. 5 is a representative schematic diagram of the voltage switching circuit that generates output voltages which are applied to the accessory interface via voltage lines . In the preferred embodiment, the voltage switching circuit generates selectable voltage levels from ±0-5 volts and ±0-25 volts. However, the voltage switch circuit may be implemented from one to any number of selectable output voltages without departing from the scope of the present invention. The active low enable signal is coupled to the respective bases of bipolar transistors and that drive respective field effect transistors FET and . The enable signal is also coupled through inverter to the respective bases of bipolar transistors and that drive respective FET transistors and . The FET transistors , and are high current devices having four source connections, three drain connections, and a gate connection, such as manufactured by Fairchild Semiconductor Corp., South Portland, Me., with FET transistors and sold under part number FDS6690A and FET transistors and sold under part number FDS9435A. Integrating capacitors , , and are respectively coupled between the gate and the drain of each FET transistor , , and . The voltage output of each FET transistor , , and is coupled through a poly fuse , , and to the respective accessory interface via voltage power lines connected to the voltage switching circuit .
An active high signal on the drive transistors , and an active low signal on the drive transistors and bias the transistors to a nonconductive off state. The transistors are biased into conduction by the application of the active low enable signal to the bases of transistors and and the invented enable signal on the bases of transistors and . The collectors of drive transistors and have series connected voltage divider resistors and , and and that are coupled to respective negative and positive programmable voltage regulators and . The programmable voltage regulator is coupled to a negative voltage source, such as a −25 volt supply voltage from the measurement test instrument . The programmable voltage regulator is coupled to the system bus that provides the selected voltage power code for the negative voltage source. The voltage power code is applied to a digital-to-analog converter that generates an analog voltage control signal that is applied to an adjustment input terminal of an adjustable voltage regulator , such as manufactured and sold by National Semiconductor, Inc., Santa Clara, Calif., under part number LM337. The output terminal of the adjustable voltage regulator is coupled to the voltage divider network of resistors and and to the source electrode of FET . The programmable voltage regulator is of similar design to the programmable voltage regulator with the regulator coupled to a positive voltage source, such as a +25 volt supply voltage from the measurement test instrument . The programmable voltage regulator receives the selected voltage supply code for the positive voltage source via the system bus that is applied to a digital-to-analog converter . The analog output from the digital-to-analog converter is applied to an adjustment terminal of an adjustable voltage regulator , such as manufactured and sold by National Semiconductor, Inc., Santa Clara, Calif., under part number LM317. The output terminal of the adjustable voltage regulator is coupled to the voltage divider network of resistors and and to the source electrode of FET . The center taps of the respective voltage divider networks , and and are coupled the gates of the FET transistors and .
The collectors of drive transistors and are coupled through resistors and to the outputs of respective negative and positive programmable voltage regulators and . The programmable voltage regulator is of the same design as regulator and programmable voltage regulator is of the same design as regulator . The programmable voltage regulator is coupled to a −5 volt source from the measurement test instrument and the programmable voltage regulator is coupled to a +5 volt source from the measurement test instrument. The selected voltage power codes for the programmable voltage regulator and are received via the system bus . The respective voltage power codes for the programmable voltage regulators and are coupled to respective digital-to-analog converters and . The analog outputs from the digital-to-analog converters and are coupled to the adjustment terminals of the respective adjustable voltage regulators and . The output terminals of the adjustable voltage regulators and of the programmable voltage regulator and are respectively applied to the source electrodes of FETs and . The gates of FET transistors and are biased by biasing resistors and that are coupled to respective positive and negative voltage sources through the drive transistors and . The voltages on the gates of the FET transistors drive the devices into conduction. The integrating capacitors , , and on each of the FET transistors , , and ramps the voltage outputs on the drain terminals of the FET transistors to the operating levels set by the programmable voltage regulators , , and . The values of the integrating capacitors determine the slopes of the ramping voltage outputs and hence the times required to reach the operating levels. The values of the capacitors may be set so that the voltage output levels from FETs and reach operating levels before the voltage output levels of FETs and . However, it is preferable to control the ramping voltage output of the FETs , , and based on the output voltage power set by the voltage power codes.
FIG. 6 is a representative schematic diagram of the voltage switching circuit having variable ramping voltage outputs. Like elements from FIG. 5 are labeled the same in FIG. . The emitters of each of the drive transistors , and are coupled to programmable current sources , , , and instead of fixed voltage levels. Each of the programmable current sources , , , and is coupled to a fixed voltage level and system bus . The system bus provides the voltage power ramping codes from the accessory device data. The voltage power ramping codes are coupled to respective digital-to-analog converters in each programmable current source , , , and that produce analog output values to variable current source . The analog output values varies the amount of charging current supplied to the respective integrating capacitors , , and , which in turn, varies the slope of the respective voltage outputs from the FETs , , and .
As was described in the general operation of the voltage switching system in the measurement test instrument , the controller has means for generating a message when the connected accessory device is not valid or supported by the measurement test instrument . Further, the accessory devices have stored current draw values for each of the voltage supplies. The controller also has means for summing each of the current draw values and means for comparing each of the summed value with stored maximum current draw values for each voltage supply.
A measurement test instrument and associated voltage management system has been described having one or more accessory device interfaces that receive accessory devices. Each accessory device has a memory device coupled to the voltage management system for receiving a voltage via a voltage input line of the voltage management system. The accessory device interface has a sensing line, a voltage input line, clock and data lines, and at least a first voltage power input line. A sensing circuit receives a sensing signal from the accessory device via the interface sensing line when an accessory device is coupled to the accessory interface. The sensing circuit generates an interrupt signal in response to the sensing signal that is coupled to a controller. The controller initiates a clock signal to the accessory device via the interface clock line in response to the interrupt signal to retrieve accessory data stored in a memory device of the accessory device via the data line. The controller determines from the retrieved accessory data if the connected accessory device is a valid device and capable of being supported by the measurement test instrument and voltage power requirements, such as voltage power codes and voltage power ramping codes, for the accessory device. The controller generates an enable signal for a valid and supported device that is coupled to a voltage switching circuit. The voltage switching circuit generates at least a first variable output voltage in response to the enable signal and the voltage power code that is coupled to the accessory device via the voltage power input line of the accessory device interface. In the preferred embodiment, the voltage switching circuit includes a plurality of variable output voltages that may be sequentially ramped-up to their operating levels by voltage power ramping codes.
In the preferred embodiment of the invention, the controller may include multiple controllers for performing concurrent program executions. A bus controller is provided that is coupled to the sensing circuit, the accessory device interfaces and the main controller. The bus controller receives and passes on an interrupt signal from the sensing circuit to the main controller. The controller causes the bus controller to poll that sensing circuit to determine which accessory interface has had an accessory device connected to it. The controller then initiates the generation of a clock signal from the bus controller to retrieve the stored data from the accessory interface. The main controller processes the retrieved data to determine if the connected device is a valid and supported device and issues an enable command to the bus controller. The bus controller outputs a stored protocol to the sensing circuit that generates an enable signal to the voltage switching circuit.
The measurement test instrument may be provided with a display device with the controller having means for generating a warning message that is displayed on the display device when an invalid and unsupported accessory device is connected to the device interface. The warning message generating means may also generate a warning message when an accessory device is connected to the measurement test instrument and the summed current draw values are greater than the maximum output voltage current draw value.
It will be obvious to those having skill in the art that many changes may be made to the details of the above-described embodiments of this invention without departing from the underlying principles thereof. The scope of the present invention should, therefore, be determined only by the following claims.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a perspective view of a measurement test instrument having an attached accessory device implementing the accessory device voltage management system according to the present invention.
FIG. 2 is a representative block diagram of a measurement test instrument incorporating the accessory device voltage management system according to the present invention.
FIG. 3 is a more detailed block diagram of the preferred embodiment of the measurement test instrument incorporating the accessory device voltage management system according to the present invention.
FIG. 4 is a representative diagram of the sensing circuit in the voltage management system according to the present invention.
FIG. 5 is a representative schematic diagram of the voltage switching circuit in the voltage management system according to the present invention.
FIG. 6 is a representative schematic diagram of the variable voltage power ramping voltage switching circuit in the voltage management system according to the present invention.
CLAIMS
1. A measurement test instrument voltage management system for an accessory device comprising: at least a first accessory device interface disposed in the measurement test instrument having a sensing line, a voltage input line, clock and data lines, and at least a first voltage power input line wherein the voltage input line provides a voltage to a memory device disposed in the accessory device; a sensing circuit receiving a sensing signal from the accessory device via the interface sensing line when the accessory device is coupled to the accessory device interface of the measurement test instrument with the sensing circuit generating an interrupt signal in response to the sensing signal; a controller receiving the interrupt signal and initiating a clock signal to the accessory device via the interface clock line to retrieve accessory data stored in a memory device of the accessory device via the data line to determine if the connected accessory device is a valid device and capable of being supported by the measurement test instrument and identifying voltage power requirements of the accessory device, the controller initiating the generation of an enable signal for a valid and supported device and at least a first voltage power code for the identified voltage power requirements; and at least a first voltage switching circuit coupled to receive the enable signal and the voltage power code for generating at least a first output voltage having the identified voltage power requirement that is coupled to the accessory device via the voltage power input line of the accessory device interface.
2. The voltage management system as recited in claim 1 further comprising an enable line coupled between the sensing circuit and the voltage switching circuit with the sensing circuit having an enable signal latch connected to the enable line that generates the enable signal in response to the controller issuing an enable signal initiation command.
3. The voltage management system as recited in claim 2 wherein the controller is a main controller further comprising a bus controller coupled to the accessory interface via the bus and clock lines and having a communications bus that includes an interrupt line, a data line and a clock line coupled to the sensing circuit and a serial bus connected to the main controller with the bus controller coupling the interrupt signal from the sensing circuit to the main controller and generating the clock signal to the accessory device in response to the main controller issuing a clock initiation command and passing the accessory device data to the main controller and passing the enable signal to the sensing circuit in response to the main controller issuing an enable signal command.
4. The voltage management system as recited in claim 1 wherein the measurement test instrument has a display device and the controller further comprises a means for generating a warning message that is displayed on the display device when an invalid and unsupported accessory device is connected to the device interface.
5. The voltage management system as recited in claim 1 wherein the output voltage from the voltage switching circuit is removed from the voltage power input line in response to the controller initiating the removal of the enable signal to the voltage switching circuit when the interrupt signal is removed in response to the sensing signal being removed from the sensing circuit.
6. The voltage management system as recited in claim 1 wherein the voltage switching circuit further comprises a programmable voltage regulator receiving a voltage signal from the voltage switching circuit and the voltage power code from the controller and generating at least the first output voltage in response to the voltage power code.
7. The voltage management system as recited in claim 1 wherein the voltage switching circuit further comprises a programmable current source receiving a voltage signal from the voltage switching circuit and a voltage power ramping code from the controller to cause at least the first variable ramping output voltage to be generated in response to the voltage power ramping code.
8. The voltage management system as recited in claim 6 wherein the voltage switching circuit further comprises a plurality of programmable voltage regulators with each programmable voltage regulator receiving a voltage signal from the voltage switching circuit and a voltage power code from the controller with the voltage switching circuit generating a plurality of output voltages in response to the voltage power codes that are coupled to the accessory device via a plurality of voltage power input lines of the accessory device interface.
9. The voltage management system as recited in claim 8 wherein the voltage switching circuit further comprises a plurality of programmable current sources with each programmable current source receiving a voltage signal from the voltage switching circuit and a voltage power ramping code from the controller to cause a plurality of variable ramping output voltages to be generated in response to the voltage power ramping code.
10. The voltage management system as recited in claim 8 wherein the plurality of output voltages from the voltage switching circuit are removed from the plurality of voltage power input lines in response to the controller initiating the removal of the enable signal to the voltage switching circuit when the interrupt signal is removed in response to the sensing signal being removed from the sensing circuit.
11. The voltage management system as recited in claim 1 further comprising: a plurality of accessory device interfaces with each interface capable of accepting an accessory device that generates a sensing signal to the sensing circuit for generating an interrupt signal to the controller with the controller initiating a clock signal to each accessory device to retrieve the respective accessory data from each device to determine if the connected accessory device is a valid device and capable of being supported by the measurement test instrument and identifying voltage power requirements of each of the accessory devices, the controller initiating the generation of an enable signal for each valid and supported device and at least a first voltage power code for the identified voltage power requirements of each accessory device; and a plurality of voltage switching circuits with each voltage switching circuit coupled to receive the enable signal and the voltage power code from the controller for the connected accessory device and generating at least a first output voltage having the identified voltage power requirement that is coupled to the accessory device via the voltage power input line of the accessory device interface.
12. The voltage management system as recited in claim 11 further comprising a plurality of enable lines with each enable line coupled between the sensing circuit and one of the plurality of voltage switching circuits with the sensing circuit having a plurality of enable signal latches with each latch connected to one of the enable lines to generate the enable signal in response to the controller issuing an enable signal initiation command.
13. The voltage management system as recited in claim 12 wherein the controller is a main controller further comprising a bus controller coupled to the plurality of accessory interfaces via the bus and clock lines and having a communications bus that includes an interrupt line, a data line and a clock line coupled to the sensing circuit and a serial bus connected to the main controller with the bus controller coupling the interrupt signal from the sensing circuit to the main controller and generating the clock signal to the plurality of accessory devices in response to the main controller issuing a clock initiation command and passing the accessory device data to the main controller and passing the enable signal to the sensing circuit in response to the main controller issuing an enable signal command.
14. The voltage management system as recited in claim 11 wherein each of the plurality of voltage switching circuits further comprises a programmable voltage regulator receiving a voltage signal from the voltage switching circuit and the voltage power code from the controller and generating at least the first output voltage in response to the voltage power code.
15. The voltage management system as recited in claim 14 wherein each of the plurality of voltage switching circuits further comprises a programmable current source receiving a voltage signal from the voltage switching circuit and a voltage power ramping code from the controller to cause at least the first variable ramping output voltage to be generated in response to the voltage power ramping code.
16. The voltage management system as recited in claim 14 wherein each of the plurality of voltage switching circuits further comprises a plurality of programmable voltage regulators with each programmable voltage regulator receiving one of a plurality of voltage signals from the voltage switching circuit and a voltage power code from the controller with each of the plurality of voltage switching circuits generating a plurality of output voltages in response to the voltage power codes that are coupled to the connected accessory device via a plurality of voltage power input lines of the accessory device interface.
17. The voltage management system as recited in claim 16 wherein each of the plurality of voltage switching circuits further comprises a plurality of programmable current sources with each programmable current source receiving one of a plurality of voltage signals from the voltage switching circuit and one of a plurality of voltage power ramping codes from the controller to cause one of a plurality of variable ramping output voltages to be generated in response to the voltage power ramping code.
18. The voltage management system as recited in claim 16 wherein the accessory data stored in each of the accessory device includes output voltage current draw values for each of the plurality of output voltages with the controller further comprising a means for summing the current draw values for each of the output voltages for each attached accessory device and a means for comparing the summed current draw values for each of the output voltages to a maximum output voltage current draw values for each of the output voltages and initiating the generation of the enable signal when the summed current draw values for each of the output voltages are less than the maximum output voltage current draw values.
19. The voltage management system as recited in claim 18 wherein the controller further comprises means for generating a warning message that is displayed on the display device when an accessory device is connected to the measurement test instrument and the summed current draw values for each of the output voltages are greater than the maximum output voltage current draw values.
20. The voltage management system as recited in claim 11 wherein the accessory data stored in each of the accessory device includes an output voltage current draw value with the controller further comprising a means for summing the current draw values for each attached accessory device and a means for comparing the summed current draw values to a maximum output voltage current draw value and initiating the generation of the enable signal when the summed current draw value is less than the maximum output voltage current draw value.
21. The voltage management system as recited in claim 20 wherein the controller further comprises means for generating a warning message that is displayed on the display device when an accessory device is connected to the measurement test instrument and the summed current draw values are greater than the maximum output voltage current draw value.
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