Semiconductor manufacturing method, substrate processing method, and semiconductor manufacturing apparatus

ABSTRACT

It is an object of the present invention to adjust the transfer environment of a substrate in order to prevent contamination of the substrate surface by impurities. A semiconductor manufacturing apparatus comprises a load-lock chamber in which substrate exchange with the outside is performed, a wafer process chamber in which the wafer is subjected to a predetermined processing, and a transfer chamber in which the wafer is transferred between the load-lock chamber and the wafer process chamber . In a semiconductor manufacturing method in which this semiconductor manufacturing apparatus is used to treat a substrate, an inert gas (N2) is supplied to and exhausted from the load-lock chamber , the transfer chamber , and the wafer process chamber while the substrate is being transferred from the load-lock chamber to the wafer process chamber through the transfer chamber , and the substrate transfer is carried out with a predetermined pressure maintained.

INFORMATION

DETAILED DESCRIPTION OF THE INVENTION

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Embodiments of the present invention will now be described through reference to the drawings.

FIG. 1 is a simplified diagram of a semiconductor manufacturing apparatus for implementing the semiconductor manufacturing method pertaining to embodiments of the present invention. This semiconductor manufacturing apparatus comprises a load-lock chamber which serves as a preliminary chamber in which wafer (substrate) exchange with the outside is performed, a wafer process chamber in which the wafer is subjected to a predetermined processing, and a transfer chamber in which the wafer is transferred between the load-lock chamber and the wafer process chamber . The transfer chamber is equipped with a transfer robot for transferring wafers, the predetermined processing may include HSG formation, epitaxial growth, vapor phase growth (formation of a thin film by CVD), formation of an oxide film, diffusion, etching, and so forth. The preliminary chamber may be an N2 purge box or the like instead of a load-lock chamber.

The load-lock chamber , the wafer process chamber , and the transfer chamber are designed to be vacuum evacuated by separate vacuum pumps (gas exhaust portion) . The load-lock chamber is openably separated from the transfer chamber , and the transfer chamber from the wafer process chamber , by gate valves and , respectively.

The load-lock chamber and the transfer chamber are connected to an N2 supply line so that N2 gas (inert gas) can be supplied. Similarly, the wafer process chamber is connected to an N2 supply line so that N2 gas can be supplied. A controller is provided for controlling the N2 gas lines and the vacuum pumps in the transfer of the wafers between the load-lock chamber and the wafer process chamber , and thereby supplying and exhausting N2 gas to and from specific chambers from among the load-lock chamber , the transfer chamber , and the wafer process chamber and maintaining a predetermined pressure inside this specific chamber. The term “specific chambers” refers to at least the chambers in which the substrate is present during wafer transfer. While the wafer is being transferred from the load-lock chamber to the transfer chamber , for instance, this would be the load-lock chamber and the transfer chamber , and while the wafer is being transferred from the transfer chamber to the wafer process chamber , this would be the transfer chamber and the wafer process chamber . Naturally, the specific chambers may be all the chambers, as this actually allows mechanical contamination to be prevented more effectively, and is also desirable in terms of transfer efficiency. The specific chambers may also be all of the chambers equipped with a vacuum pump. It is also preferable for N2 gas to be supplied to and exhausted from the chambers when the wafer is not being transferred and there are no wafers in the chambers, since this will keep the insides of the chambers in a clean state. It is also preferable for gas to be supplied and exhausted at all times in the vacuum evacuation of the chambers by the vacuum pumps, whether during wafer transfer or otherwise, so that a gas flow will be formed from upstream to downstream with respect to the vacuum pumps.

When a specific wafer processing process is conducted in this semiconductor manufacturing apparatus, in the transfer of the wafer from the load-lock chamber to the wafer process chamber , all of the chambers (the load-lock chamber , transfer chamber , and the wafer process chamber ) are exhausted by the vacuum pumps while N2 gas is being supplied, and the load-lock chamber , the transfer chamber , and the wafer process chamber are maintained at a predetermined pressure. The wafer is transferred while the load-lock chamber , the transfer chamber , and the wafer process chamber are maintained at this predetermined pressure.

In more specific terms, of the closed gate valves , , and , first the gate valve (for exchange with the outside) is opened, a cassette holding a plurality of wafers is transferred into the load-lock chamber , and the gate valve is closed. After this, the load-lock chamber is vacuum evacuated to the attainable vacuum pressure, after which an inert gas (such as N2) is introduced into and exhausted from the load-lock chamber so that the load-lock chamber is at the transfer pressure. Thereafter, at least while the cassette (that is, the wafers) is present in the load-lock chamber , the inert gas continues to be supplied to and exhausted from the load-lock chamber , so that the inside of the load-lock chamber is kept at a constant pressure. The wafer process chamber and the transfer chamber are adjusted in advance by the introduction and exhaust of inert gas, so that the pressure inside the transfer chamber is maintained at the transfer pressure. As for the wafer process chamber , this state is maintained except during wafer processing, while this state is maintained for the transfer chamber during operation of the apparatus. At the point when the pressure inside the load-lock chamber is equal to the pressure inside the transfer chamber , that is, the transfer pressure, the gate valve is opened, a wafer is transferred to the transfer chamber , and the gate valve is closed. After this, at the point when the pressure inside the transfer chamber is equal to the pressure inside the wafer process chamber , the gate valve is opened, a wafer is transferred to the wafer process chamber , the gate valve is closed, and the wafer is treated. After wafer processing, the wafer is transferred by the opposite procedure as that given above.

Doing this effectively prevents the reverse diffusion of oil from the vacuum pumps to the load-lock chamber , the wafer process chamber , and the transfer chamber , and also suppresses the volatilization of impurities from chamber structures (such as the shaft seals of a transfer robot or the O-rings used as chamber seals), and as a result, the effect of contamination caused by impurities can be minimized and the processing quality of the wafers enhanced.

In order to test the effect of this embodiment, the above-mentioned semiconductor manufacturing apparatus was used to deposit a polycrystalline silicon film on a silicon substrate, and contamination analysis was conducted at the interface thereof. FIG. 2 is a flow chart of producing a sample for this contamination analysis, while FIG. 3 shows the results of the contamination analysis. The object of the contamination analysis was carbon (C), assuming an organic substance with a high likelihood of becoming an out-gas component from a structural member or the oil in the vacuum pumps. The steps in FIG. 2 are described below.

S: A silicon substrate whose surface has undergone a cleaning processing such as the removal of a natural oxidation film is put into the load-lock chamber.

S: The atmosphere in the load-lock chamber is replaced.

S: The silicon substrate is moved through the transfer chamber to the process chamber.

S: A polycrystalline silicon film is deposited in a thickness of 50 nm on the silicon substrate in the process chamber. The polycrystalline film formation conditions are as follows.

S: After film formation in the process chamber, the silicon substrate is returned to the load-lock chamber.

In the above steps S to S, samples are produced at the following two settings for the silicon substrate transfer pressure.

(a) 0.1 Pa or less: conventional setting (under the attainable vacuum resulting from evacuation by the vacuum pumps)

(b) 133 Pa: present embodiment setting (N2 gas exhausted while being introduced)

S: The load-lock chamber is returned to atmospheric pressure.

S: The silicon substrate is taken out of the load-lock chambers and the silicon substrate surface is analyzed for contamination. The contamination analysis method involved using SIMS (Secondary Ion Mass Spectroscopy) to analyze the carbon concentration at the interface (analysis plane) between the silicon substrate and the polycrystalline silicon film (50 nm) deposited on the silicon substrate in the above steps.

As seen in FIG. 3, the carbon concentration at (a) a conventional setting and (b) the setting in this embodiment is (a) 1.90×1014 atons/cm2 and (b) 3.70×1013 atoms/cm2, indicating that the use of the setting in this embodiment tends to reduce contamination by about one order of magnitude as compared to when the conventional setting is used. According to the ITRS (International Technology Roadmap of Semiconductors) published in 1999 in regard to this, the standard for organic substances on treated substrates was predicted to be 4.10×1013 or less with 100-nm devices in the year 2005, so the present embodiment, in which the amount of organic substances was reduced from 1.90×1014 atoms/cm2 to 3.70×1011 atoms/cm2, is clearly superior.

It has also been stated in publications that the amount of organic substances must be standardized at 1.0×1013 atoms/cm2 or less.

Results have also been obtained indicating that the best carbon concentration data obtained through processing under the conditions of this embodiment (introducing and exhausting N2 gas) is 5.0×1012 atoms/cm2. This means it is possible that this embodiment will satisfy this standard for organic substances. Furthermore, while there is a slight discrepancy in the two pieces of data given above and obtained by processing using the conditions of this embodiment, this can be attributed to the fact that variance occurs in the measurement values depending on the measurement environment and on the measurement method in the measurement of the same wafer.

The reason this embodiment is thus able to satisfy the specified standard is that an inert gas is introduced into and exhausted from all of the chambers having vacuum pumps (the process chamber, transfer chamber, and load-lock chamber), and not only mechanical contamination, but also chemical contamination caused by trace amounts of volatile impurity (out-gas) components coming from chamber structures or the reverse diffusion of oil from a vacuum pump can be effectively eliminated from the entire semiconductor manufacturing apparatus. In this respect, with the method of the known example, whose primary object was to prevent the generation of dust from mechanical moving parts (mechanical contamination), the entry and exit chambers were excluded from the chambers into and from which the inert gas was introduced and exhausted, so the effective elimination of chemical contamination could not be achieved. In contrast, with this embodiment, since the inert gas is introduced into and exhausted from the load-lock chamber as well, the above-mentioned standard can be satisfied for all of the plurality of wafers held in a cassette present in the load-lock chamber during wafer transfer or processing.

Also, with this embodiment, since the inert gas is supplied to and exhausted from all of the chambers, which prevents the reverse diffusion of oil from the vacuum pumps, there is no need to provide each chamber with a turbo molecular pump that has little reverse diffusion of oil, or to modify the members inside the transfer chamber (such as using metal O-rings), or to employ means for lowering the partial pressure of impurities in the transfer space by using a super-high vacuum of about 10−8 Pa. Therefore, there is no need to raise the pressure of the process chamber up to the film formation pressure, and there is none of the attendant decrease in throughput. As a result, the cost is low and maintenance is easy with this embodiment.

Next, a semiconductor manufacturing apparatus and semiconductor manufacturing method for forming an HSG film on a substrate on the surface of which is formed an amorphous silicon film serving as a capacitance electrode will be described as specific examples. HSG refers to markedly protruding hemispherical crystal grains formed on the film surface. A film on which this HSG has been formed has a large surface area, which ensures a large capacity. A known technique for forming HSG is discussed, for example, in the above-mentioned Japanese Laid-Open Patent Application H5-304273 (U.S. Pat. No. 2,508,948).

First, we will describe a method for manufacturing a semiconductor device including the above-mentioned HSG film. A method for manufacturing a DRAM 500 equipped with a capacitor cell, to which the present invention can be favorably applied, will be described through reference to FIGS. and . In FIG. 4, a field oxide film is formed on the surface of a silicon substrate , forming a plurality of separate transistor formation regions. A gate oxide film is formed in each transistor formation region, over which a gate electrode is formed. The gate electrode and the field oxide film are used as masks, impurities are introduced into the surface of the silicon substrate by ion implantation, and a source and a drain are self-matchingly formed. After this, an interlayer insulating film is formed, and then a contact hole that exposes the source is formed in the interlayer insulating film .

Next, an amorphous silicon film is deposited over the interlayer insulating film , this is patterned, the natural oxide film of the amorphous silicon film is removed, polycrystallization is performed, and a capacitive lower electrode is formed. As shown in FIG. 5, in this polycrystallization processing, markedly protruding hemispherical crystal grains (HSG) 600 are formed on the surface of the amorphous silicon film, thereby increasing the surface area of the capacitive lower electrode . A capacitive insulating film composed of Ta2O5 is then formed, over which a capacitive upper electrode is formed from a polycrystalline silicon film or the like. The result of this is a DRAM in which a capacitor cell is connected to the source of an MOS transistor.

FIG. 6 is a plan view of a semiconductor manufacturing apparatus for forming an HSG film, and FIG. 7 is a vertical cross section of a reaction chamber within the semiconductor manufacturing apparatus.

In FIG. 6, which shows a semiconductor manufacturing apparatus, is a transfer chamber, and a first load-lock chamber , a first cooling chamber , a first reaction chamber , a second reaction chamber , a second cooling chamber , and a second load-lock chamber that constitute a plurality of vacuum chambers are provided radially around the periphery of this transfer chamber . Gate valves , , , and are provided between the transfer chamber and the first load-lock chamber , the first reaction chamber , the second reaction chamber , and the second load-lock chamber , respectively. A wafer transfer robot is installed in the transfer chamber . With this semiconductor manufacturing apparatus, the first reaction chamber and the second reaction chamber correspond to the “process chamber” referred to in the present invention.

In FIG. 7, which shows a reaction chamber, the first reaction chamber , which is linked to the transfer chamber via the gate valve , has a nozzle for supplying monosilane gas (SiH4) to the gas system needed for film formation, and a super-high vacuum is achieved by drawing in the gas in a single direction with a turbo molecular pump via an exhaust pipe facing in the opposite direction from the nozzle with respect to a wafer W. A flux control valve is provided to the pipe leading to the SiH4 supply nozzle , and this flux control valve is controlled by a flux controller so that the flux of the SiH4 gas supplied into the first reaction chamber is the specified flux.

Wafer in-plans uniformity can be ensured with good selectivity by having the monosilane flow in a single direction with respect to the wafer plane. This is because monosilane is used, which has a lower growth rate than disilane and makes it easier to control HSG formation.

If the reaction chamber pressure is low (0.5 Pa or less), the gas flow will be faster, and wafer in-plane uniformity will be better due to sufficient surface reaction rate limiting at 600 to 620° C. Also, the construction of the reaction chamber is such that the wafers are heated above and below by a split resistance heater that faces the wafer W surface, the result being that it is easier to ensure temperature uniformity within the wafer plane in a abort time. The split resistance heater is controlled by a temperature controller so that the temperature inside the first reaction chamber will be the specified temperature, namely, any temperature between 600 and 620° C.

A method for treating wafers using the above-mentioned semiconductor manufacturing apparatus will now be described. First, before the wafers on which an amorphous silicon film has been formed at a specific capacitive electrode portion of the semiconductor chip that serves as the semiconductor element are transferred into the above-mentioned semiconductor manufacturing apparatus, a natural oxide film or a chemical oxide film formed by a mixture of NH4OH+H2O2+H2O is washed away with a dilute hydrofluoric acid aqueous solution, for example, after which a drying processing is performed with a spin dryer or the like. The specific capacitive electrode portion is generally the lower electrode portion connected to the source/drain region of a MOS transistor. After drying, a gate valve is opened in the load-lock chamber inside the semiconductor manufacturing apparatus shown in FIG. 6, wafers are quickly transferred into the chamber in cleaned cassette units, and the gate valve is closed. The reason for transferring while clean is to prevent the re-formation of natural oxide film or contamination by the atmosphere in the clean room, and the transfer up to the load-lock chamber must be carried out quickly. At this point, if there is a large amount of contamination, natural oxide film, or the like adhering to or formed on the amorphous silicon surface, there will be a difference in the silicon bonding density between the state of the amorphous silicon surface and the state of the natural oxide film surface deposited over the amorphous silicon, for instance, so there will be no HSG formation, or there will be variance in the HSG formation state, namely, the HSG particle size and density, which leads to a lower semiconductor device yield.

After the cassette holding a plurality of wafers has been transferred into the load-lock chamber as above, the load-lock chamber is vacuum evacuated to the attainable vacuum pressure, after which high-purity nitrogen (N2) is supplied into and exhausted from the load-lock chamber (hereinafter this will be referred to as purging) to bring the inside of the load-lock chamber to the transfer pressure. Thereafter, at least while the cassette (that is, the waters) is present in the load-lock chamber , the introduction and exhaust of N2 gas into and from the load-lock chamber is continued so as to maintain the load-lock chamber at a predetermined pressure.

The reason for exhausting the high-purity nitrogen (N2) while it is supplied here is to provide a vapor flow by purging and prevent contamination by trace amounts of volatile impurity components from chamber structures or the reverse diffusion of oil from the vacuum pumps. The purpose of purging with dry nitrogen (N2) is to make sure that water will thoroughly saturate the atmosphere. This is also because sudden depressurization will not cause all of the water (liquid) adhering to the wafer surfaces, the cassette, and so forth to become steam (vapor), and actually when part of the water becomes a vapor, the resulting loss of heat lowers the temperature to the point that the water turns into ice (solid), and using dry nitrogen also prevents this. The ice melts into water after being transferred through the reaction chamber , and can cause part of the surface to oxidize, hampering HSG formation. It is also effective to replace as much of the remaining substances as possible by raising the pressure inside the load-lock chamber several times.

The inside of the reaction chambers and and the transfer chamber are first put in a state in which N2 gas is being introduced and exhausted so as to maintain the pressure inside the transfer chamber at the transfer pressure. This state is maintained for the reaction chambers and except during wafer processing, and is maintained for the transfer chamber throughout apparatus operation.

At the point when N2 gas has been introduced into and exhausted from the load-lock chamber until the pressure inside the load-lock chamber is equal to the pressure inside the transfer chamber , that is, the transfer pressure, the gate valve is opened, a wafer W is transferred by the wafer transfer robot to the transfer chamber , and the gate valve is closed. Then, at the point when the pressure inside the transfer chamber is equal to the pressure inside the process chamber , the gate valve is opened, the wafer W is transferred into the process chamber , the gate valve is closed, and the wafer W is treated. Following this wafer processing, the wafer W is transferred by the opposite procedure as that given above. Nitrogen (N2) is supplied to and exhausted from the load-lock chamber , the transfer chamber , and the reaction chamber at all times to keep impurity substances present or generated in the load-lock chamber , the transfer chamber , and the reaction chamber from adhering to the wafer surface. Specifically, each chamber is prevented from being contaminated by trace amounts of volatile impurity components from chamber structures (such as the shaft seals of the transfer robot or the O-rings used as chamber seals) or the reverse diffusion of oil from the vacuum pump.

With an apparatus such as this, no pump capable of producing a super-high vacuum (10−6 Pa) is used except in the reaction chambers. This is because supplying and exhausting N2 gas to and from the load-lock chamber and the transfer chamber during transfer as above allows the wafer surface to be transferred to the reaction chambers while its surface is still clean, so there is no need for a pump capable of producing a super-high vacuum other than in the reaction chamber . This not only makes the apparatus less expensive, but also shortens the processing time.

The process carried out in the reaction chambers will now be described.

The temperature of the wafer W transferred to the reaction chamber stabilizes at 600 to 620° C., which is the preset reaction chamber temperature. The stabilization of the temperature is performed in a atmosphere consist of a high vacuum or in a atmosphere consist of a non-reactive gas that will not react with the amorphous silicon surface, such as an inert gas involving nitrogen gas. When temperature stabilization and crystallization are both taken into account, though, it is preferable for the temperature stabilization time to be about 5 minutes so that the in-plane temperature stabilization of the wafer and the polycrystallization of the underlying amorphous silicon will not hamper HSG formation. Thereafter, the above-mentioned reaction chamber temperature is maintained.

When the above-mentioned atmosphere is a non-reactive gas atmosphere, after it has been thoroughly removed, monosilane is allowed to flow in at a rate of 150 to 200 cc per minute for 2 to 2.5 minutes to form (generate) fine crystal nuclei on the amorphous silicon surface. The density of these crystal nuclei tends to increase along with wafer temperature and nucleation time, and when the monosilane flux is small, the nucleation time has to be increased.

Finally, the supply of monosilane is stopped, and crystal grains are formed by growing the crystal nuclei formed on the amorphous silicon surface by migration of the silicon atoms. The size of these crystal grains tends to increase along with grain growth time, with growth being substantially maximized after 5 minutes, so the time is adjusted to between 3 and 5 minutes. If this time is too long, the grains will bond together into larger grains, decreasing the rate of increase in surface area that is the object of the present invention, so the time must be limited. The reason the term “substantially” is used above is that the time at which growth is maximized will vary with the growth conditions.

As a specific example, HSG with good wafer in-plans uniformity and stable, selective HSG formation was achieved by employing the above-mentioned specific conditions, such as a reaction chamber temperature of 610° C. a temperature stabilization time of 5 minutes, a monosilane (SiH4) flow of 200 sccm, a nucleation time of 2 minutes, and a grain growth time of 3 minutes. Similar results were obtained at a reaction chamber temperature of 610° C., a temperature stabilization time of 5 minutes, a monosilane (SiH4) flow of 150 seam, a nucleation time of 2.5 minutes, and a grain growth time of 5 minutes. Treating under the above conditions also allows the number of wafers treated per unit of time to be 20/hr, allows the number of wafers treated per unit of time to be increased over the number treated in a vertical apparatus process (16/hr), and increases throughput.

In the HSG formation process, FIG. 8 is a drawing of an SEM (Scanning Electron Microscope) photograph of when the wafer was transferred under the attainable vacuum (conventional example), and FIG. 9 when the wafer was transferred under nitrogen purging (specific example of the present invention). These drawings are given as a comparison of the results of these cases.

As shown in FIG. 8, during transfer under attainable vacuum, contamination of the wafer surface precluded adequate HSG formation (the surface was not very bumpy), whereas, when the wafer was transferred while nitrogen gas (N2) was supplied to and exhausted from the load-lock chamber , the transfer chamber , and the reaction chamber (supplied under conditions of flux=0.5 slm, during which time the transfer pressure=50 Pa), as in FIG. 9, good HSG formation was possible. Similar results were obtained when the pressure was over 50 Pa.

Examples of applying the present invention to an HSG formation process were given above, but the present invention can also be applied to a semiconductor manufacturing apparatus and manufacturing method involving an epitaxial growth process. In this case, when the N2 supply to the transfer chamber was adjusted to a flux of 10 slm and a transfer pressure of 400 to 1333 Pa, the crystal defects that occurred during conventional transfer under attainable vacuum did not occur. Similarly, the present invention can also be applied to doping processing (such as p doping), and film formation processing (eg, Ta2O5 films, Si3N4 films, and polycrystalline silicon films).

As described above, with the present invention, an inert gas is supplied to and exhausted from the preliminary chamber, transfer chamber, or process chamber during the transfer of a substrate, which adjusts the environment conditions so as to suppress chemical contamination, and as a result, contamination of a substrate surface present in a chamber can be minimized, affording better quality and higher yield with semiconductor elements and substrates. Furthermore, all that need be done is to add the feature of supplying and exhausting an inert gas to the chambers, so these effects can be achieved easily, at low cost, and without increasing the maintenance load.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a simplified diagram of a semiconductor manufacturing apparatus for implementing the semiconductor manufacturing method and substrate processing method pertaining to embodiments of the present invention;

FIG. 2 is a flow chart of the production of a contamination analysis sample;

FIG. 3 is a table showing contamination analysis results comparing conventional conditions and the present invention conditions;

FIG. 4 is a cross section of a DRAM chip equipped with a capacitor cell;

FIG. 5 is an enlarged detail view of FIG. 4;

FIG. 6 is a simplified plan view of a semiconductor manufacturing apparatus for implementing an HSG formation process pertaining to an embodiment of the present invention;

FIG. 7 is a vertical cross section of a reaction chamber within the semiconductor manufacturing apparatus of FIG. 6;

FIG. 8 is a drawing of an SEM photograph of a wafer after an HSG formation process when the present invention is not implemented, which has been copied so as to make the diagram easier to understand; and

FIG. 9 is a drawing of an SEM photograph of a wafer after an HSG formation process when the present invention is implemented, which has been copied so as to make the diagram easier to understand.

CLAIMS

1. A semiconductor manufacturing method, comprising: a first step of carrying a substrate into a preliminary chamber from an external part; a second step of continuously supplying and exhausting an inert gas to and from said preliminary chamber at least from a time before opening a first gate valve between said preliminary chamber and a transfer chamber, after the substrate is carried into said preliminary chamber, a third step of transferring said substrate to said transfer chamber from said preliminary chamber, in a state in which the inert gas is continuously supplied and exhausted to and from said preliminary chamber and said transfer chamber, after said first gate valve is opened; a fourth step of transferring said substrate to a process chamber from said transfer chamber in a state in which the inert gas is continuously supplied and exhausted to and from said transfer chamber and said process chamber, after a second gate valve between said transfer chamber and said process chamber is opened; and a fifth step of subjecting said substrate to predetermined processing in said process chamber.

2. The semiconductor manufacturing method according to claim 1, wherein the exchange of the substrate between said preliminary chamber and the outside is carried out with a cassette that holds a plurality of substrates.

3. The semiconductor method according to claim 1, wherein the predetermined processing to which the substrate is subjected in said process chamber is HSG formation or epitaxial growth.

4. The semiconductor manufacturing method according to claim 1, wherein at least one vacuum pump is coupled to said three chambers, and this vacuum pump is used when the inert gas is supplied and exhausted to and from said chamber.

5. A semiconductor manufacturing method, comprising the steps of: exchanging a substrate between a preliminary chamber and an external part; subjecting the substrate to predetermined processing in a process chamber; and transferring the substrate through a transfer chamber provided between said preliminary chamber and said process chamber, wherein said substrate transferring step comprises the following three steps: a first step of transferring said substrate from said preliminary chamber to said transfer chamber; a second step of holding in said transfer chamber said substrate transferred to said transfer chamber; and a third step of transferring said substrate from said transfer chamber to said process chamber; and wherein an inert gas is continuously supplied and exhausted to and from all of said three chambers during said three steps of said substrate transferring step.

6. The semiconductor manufacturing method according to claim 5, wherein at least one vacuum pump is coupled to said three chambers, and this vacuum pump is used when the inert gas is supplied and exhausted to and from all of said chambers.

7. A semiconductor manufacturing method, comprising the steps of: exchanging a substrate between a preliminary chamber and an external part; subjecting the substrate to predetermined processing in a process chamber; and transferring the substrate through a transfer chamber provided between said preliminary chamber and said process chamber, wherein said substrate transferring step comprises the following three steps: a first step of transferring said substrate from said preliminary chamber to said transfer chamber; a second step of holding in said transfer chamber said substrate transferred to said transfer chamber; and a third step of transferring said substrate from said transfer chamber to said process chamber, and wherein an inert gas is continuously supplied to all of said chambers coupled to a vacuum pump among said three chambers and exhausted from this chamber using said vacuum pump during said three steps of said substrate transferring step.

8. The semiconductor manufacturing method according to claim 7, wherein at least one vacuum pump is coupled to all of said three chambers.

9. A substrate processing method, comprising: a first step of carrying a substrate into a preliminary chamber from an external part; a second step of continuously supplying and exhausting an inert gas to and from said preliminary chamber at least from a time before opening a first sate between said preliminary chamber and a transfer chamber, after the substrate is carried into said preliminary chamber; a third step of transferring said substrate to said transfer chamber from said preliminary chamber, in a state in which the inert gas is continuously supplied and exhausted to and from said preliminary chamber and said transfer chamber, after said first gate valve is opened; a fourth step of transferring said substrate to a process chamber from said transfer chamber in a state in which the inert gas is continuously supplied and exhausted to and from said transfer chamber and said process chamber, after a second gate valve between said transfer chamber and said process chamber is opened; and a fifth step of subjecting said substrate to predetermine processing in said process chamber.

10. The semiconductor manufacturing method according to claim 9, wherein at least one vacuum pump is coupled to said three chambers, and this vacuum pump is used when the inert gas is supplied and exhausted to and from said chamber.

11. A semiconductor manufacturing method, comprising the steps of: exchanging a substrate between a preliminary chamber and an external part; subjecting the substrate to predetermined processing in a process chamber; and transferring the substrate through a transfer chamber provided between said preliminary chamber and said process chamber, wherein said substrate transferring step comprises the following three steps: a first step of transferring said substrate from said preliminary chamber to said transfer chamber; a second step of holding in said transfer chamber said substrate transferred to said transfer chamber; and a third step of transferring said substrate from said transfer chamber to said process chamber, and wherein at least one vacuum pump is coupled to said three chambers, and in this vacuum pump, an inert gas is continuously introduced into the vacuum pump from an upstream side of the vacuum pump, and the vacuum pump operates to exhaust the inert gas in all the chambers, during said three steps of said substrate transferring step.

12. A semiconductor manufacturing method, comprising the steps of: exchanging a substrate between a preliminary chamber and an external part; subjecting the substrate to predetermined processing in a process chamber; and transferring the substrate through a transfer chamber provided between said preliminary chamber and said process chamber, wherein an inert gas is continuously supplied and exhausted to and from said preliminary chamber during said substrate transferring step.

13. The semiconductor manufacturing method according to claim 12, wherein a vacuum pump is coupled to at least said preliminary chamber among said three chambers, and this vacuum pump is used when the inert gas is supplied and exhausted to and from said preliminary chamber.

14. The semiconductor manufacturing method according to claim 12, wherein a cassette holding the plural substrates is used for the exchange of the substrate between said preliminary chamber and the external part, and the cassette holding the plural substrates is transferred into said preliminary chamber.

15. A semiconductor manufacturing method, comprising the steps of: exchanging a substrate between a preliminary chamber and an external part; subjecting the substrate to predetermined processing in a process chamber, and transferring the substrate through a transfer chamber provided between said preliminary chamber and said process chamber, the method further comprising the step of: continuously supplying and exhausting an inert gas to and from the preliminary chamber during a period in which the substrate is present within said preliminary chamber after the substrate is transferred into said preliminary chamber.

16. The semiconductor manufacturing method according to claim 15, wherein a vacuum pump is coupled to at least said preliminary chamber among said three chambers, and this vacuum pump is used when the inert gas is supplied and exhausted to and from said preliminary chamber.

17. The semiconductor manufacturing method according to claim 15, wherein a cassette holding the plural substrates is used for the exchange of the substrate between said preliminary chamber and the external part, and the cassette holding the plural substrates is transferred into said preliminary chamber.

COPYRIGHT

User acknowledges that Fairview Research and its third party providers retain all right, title and interest in and to this xml under applicable copyright laws. User acquires no ownership rights to this xml including but not limited to its format. User hereby accepts the terms and conditions of the License Agreement.