Damascene structure fabricated using a layer of silicon-based photoresist material

ABSTRACT

A damascene structure, and a method of fabricating same, containing relatively low dielectric constant materials (e.g., k less than 3.8). A silicon-based, photosensitive material, such as plasma polymerized methylsilane (PPMS), is used to form both single and dual damascene structures containing low k materials. During the manufacturing process that forms the damascene structures, the silicon-based photosensitive material is used as both a hard mask and/or an etch stop.

INFORMATION

DETAILED DESCRIPTION OF THE INVENTION

To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures.

DETAILED DESCRIPTION

The present invention uses a silicon-based, photoresist material (e.g., plasma polymerized methylsilane (PPMS)) as an etch stop, hard mask or resist, to form a dual or single damascene structure. The PPMS is patterned using ultra-violet (UV) light in conjunction with either a conventional opaque mask or a grey tone mask.

The following description is divided into a plurality of sections that describe various embodiments of the present invention. Specifically, Section A discloses a dual damascene structure fabricated using a conventional opaque mask to define an interconnection pattern, Section B discloses a single damascene structure fabricated using a conventional opaque mask to define an interconnection pattern, and Section C describes the use of a grey tone mask to form a dual damascene structure.

A. Dual Damascene Structure

FIGS. 1A-1H depict the process steps utilized to fabricate a dual damascene structure in accordance with the present invention. FIG. 1A depicts a cross-sectional view of a semiconductor wafer substrate . FIG. 1B depicts a first layer of an insulative material having low dielectric constant (low k material having a dielectric constant k<3.5) deposited upon the substrate . Such low k materials can include amorphous fluorinated carbon as well as other organic spin-on polymeric materials (e.g., PAE-2, Flare 2.0, SLK, and the like) or vapor deposited materials. The low k material is deposited onto the substrate using chemical vapor deposition (CVD), vapor deposition, or spin-on techniques. The film deposited onto the substrate has an approximate thickness of the depth of the via (e.g., 0.2 to 2 um).

In FIG. 1C, a layer of radiation sensitive, silicon-based, photoresist material (e.g., plasma polymerized methylsilane (PPMS)) is deposited using a chemical vapor deposition (CVD) process atop the low k material layer . Illustrative processes that are useful to deposit radiation sensitive organic materials (e.g., PPMS and other such materials) are disclosed in U.S. Pat. No. 5,439,780 issued Aug. 8, 1995 and herein incorporated by reference. The PPMS layer has an approximate thickness of 0.1 to 0.3 um. At the process step depicted in FIG. 1D, the PPMS layer is selectively exposed to ultraviolet (UV) light which converts the exposed PPMS into an oxide, PPMSO, and leaves the unexposed areas of PPMS as PPMS. As such, the PPMS layer becomes a PPMS/PPMSO layer. The selective application of UV light is performed using deep UV (248 nm or 193 nm) steppers in the presence of air.

The patterns in the layer are developed using a chlorine (Cl2) or Cl2/HBr-based plasma etch to remove the unexposed PPMS from the PPMS/PPMSO layer , leaving a pattern of apertures within the PPMSO layer . The apertures define the size and shape of the ultimate vias that will extend through the first insulator layer to the substrate . The low k dielectric layer is unaffected while etching the PPMS using a chlorine-based plasma etch.

At the step depicted in FIG. 1E, a second low k insulative layer is deposited to a thickness of approximately equal to the trench depth (e.g., 0.2 to 2 um) atop the layer . FIG. 1F depicts a second layer of PPMS deposited via a CVD process atop the low k layer . In FIG. 1G, the PPMS layer is patterned using ultraviolet light to create PPMSO in the exposed areas and leaving PPMS in the unexposed areas. This pattern defines trenches that are to be formed in the second insulative layer . Again, a chlorine or Cl2/HBr-based plasma is used to remove the PPMS leaving a gap in the layer that defines the size and shape of the trench. The structure of FIG. 1G is then etched in an oxygen-based chemistry to selectively remove the low k material beneath gap and aperture . FIG. 1H depicts across sectional view of the final dual damascene structure . The PPMSO acts as an oxide-like material which is not affected by the oxygen-based chemistry. Thus, the layer serves as a hard mask to facilitate low k material etch, and layer serves as an etch stop to maintain the via profile

As such, the PPMSO provides an etch selectivity greater than 50, compared to a low k material such as a-C:F. It is this high resistance to oxygen plasma that makes PPMSO an excellent etch stop (layer ) and a hard mask-type material (layer ) for etching organic low k polymers using oxygen plasma.

Furthermore, the PPMS can be deposited at a relatively low temperature (e.g., 150° C.) such that various other low k materials can be used to form dual damascene structures that would otherwise not be available if high temperature (e.g., >350° C.) processing was required for etch stop or hard mask creation.

FIG. 2 depicts a sectional, perspective view of a complete dual damascene structure having a metallization deposited into the damascene structure that was created using the inventive steps depicted in FIGS. 1A-1H. The metallization is accomplished by physical vapor deposition (PVD), chemical vapor deposition (CVD), electoplating or electroless plating of a metal such as tungsten, copper or copper alloys, aluminum or aluminum alloys, metal alloys and the like onto the structure of FIG. H. The metal simultaneously fills both the via and the trench to provide a conductive path to the substrate . The metal is then planarized using a conventional chemical-mechanical polishing (CMP) technique and passivated, i.e., cleaned using an H2-based chemistry and a silicon-nitride deposition of a passivation layer.

Alternatively, the metallization is accomplished using a combination of CVD and PVD deposition, where a thin layer of metal (a liner) deposited using a CVD process and a filler is deposited using a PVD deposition. A detailed description of this sequential CVD/PVD process is disclosed in commonly assigned U.S. Pat. No. 5,877,078 filed Nov. 21, 1995, incorporated herein by reference. Other techniques for filling a damascene structure include those disclosed in commonly assigned U.S. Pat. Nos. 5,371,042, issued Dec. 6, 1994 and 5,443,995 issued Aug. 22, 1995.

In addition, a low temperature (<150° C.) deposition of PPMS-based etch stop and resist combined with electroless or electroplated metal such as copper and its alloys (e.g., Cu-Sn, Cu-Mg and the like) provides an overall low temperature process to fabricate a dual damascene structure that is compatible with all low K materials.

B. Single Damascene Structure

The foregoing process of producing a dual damascene structure can be adapted to produce a single damascene structure. FIG. 3A through 3I depict the process steps for generating a single damascene structure in accordance with the present invention. FIG. 3A depicts a cross-sectional view of a semiconductor wafer substrate . FIG. 1B depicts a first layer of a material having a low dielectric constant deposited upon the substrate . Such a low k material includes any carbon based organic polymer. The low k material is deposited onto the substrate using CVD, vapor deposition, or spin-on technique. The film is deposited onto the substrate to an approximate thickness of a via, e.g., 0.2 to 2 um.

In FIG. 1C, a layer of silicon-based photoresist material (e.g., plasma polymerized methylsilane (PPMS)) is deposited using a chemical vapor deposition (CVD) process atop the low k material layer . The PPMS layer has an approximate thickness of 0.1 to 0.3 micrometers. At the process step depicted in FIG. 3D, the PPMS layer is selectively exposed to ultraviolet light which converts the exposed PPMS into an oxide, PPMSO, and leaves the unexposed areas of PPMS as PPMS. As such, the PPMS layer becomes a PPMS/PPMSO layer. The selective application of UV light is performed using deep UV (240 nm or 193 nm) steppers in the pressure of ambient air and a patterned photoresist mask positioned over the PPMS layer while the layer is illuminated with UV light.

The pattern in the layer is developed using a chlorine-based plasma etch to remove the unexposed PPMS from the PPMS/PPMSO layer , leaving a pattern of apertures within the PPMSO layer . The apertures define the size and shape of the ultimate vias that will extend through the first insulator layer to the substrate . The low k dielectric layer is unaffected while etching the PPMS with an chlorine-based etchant.

At the step depicted in FIG. 3E, the structure is then etched in an oxygen-based chemistry to selectively remove the low k material beneath aperture . The PPMSO acts as an oxide-type material which is not affected by the oxygen-based chemistry and serves as an hard mask that limits the amount of low k material that is removed outside of the aperture .

In FIG. 3F, a metallization layer is deposited upon the single damascene structure to fill the aperture with metal. Metallization can be accomplished in any one of the previously discussed metallization processes and techniques. Using polishing techniques such as chemical-mechanical polishing (CMP), the metal that covers the top layer of the structure is removed, thereafter the PPMSO layer is also removed by CMP. Such polishing planarizes the rmetallization leaving only material in the via area . Thereafter, as shown in FIG. 3G, a copper passivation layer is deposited over the structure, i.e., the planarized metal is cleaned using an H2-based chemistry and a passivation layer, for example, silicon-nitride is deposited atop the copper metallization.

Steps B through E are then repeated to add the upper portion of the single damascene structure . This repeated structure creates the trench portion of the interconnections. Specifically, as depicted in FIG. 3H, a second layer low K material is deposited over the passivation layer , then a layer of PPMS is deposited, patterned and etched in a chlorine etchant as discussed above. The PPMSO layer defines the trench dimensions. The PPMSO layer is then used as an etch stop as the trench is formed using an oxygen-based chemistry to remove the PPMS. Lastly, the copper passivation layer is etched in the aperture area using a non-oxygen-based chemistry (e.g., fluorine-based) to remove a portion of the passivation layer to facilitate contact with the metal of layer . Once the trench is formed (a portion of (FIG. G), the trench is metallized and planarized. Lastly, the copper passivation layer is deposited atop the entire structure . Before the copper passivation, it may be necessary to clean up the surface oxidation of the copper using such methods as an H2 treatment.

As with the dual damascene structure, the single damascene structure utilizes the PPMSO as an etch stop and a hard mask type material for etching the low k polymers within an oxygen plasma. Such use of PPMS provides a superb etch selectivity when etching organic low k materials.

C. Damascene Structure Formed Using A Grey Tone Mask

In an alternative embodiment of the invention, a dual damascene structure is fabricated using a single lithography step and a single development and pattern transfer etch sequence. As such, the process by which a dual damascene structure is fabricated is substantially simplified.

This approach takes advantage of the combination of unique features of PPMS to form a dual damascene structure. Specifically, the inventive process utilizes the ability to control the degree of photo-oxidation with respect to UV exposure, which in turn will determine the amount of PPMS or PPMSO (depending on development process tone: positive or negative) remaining in the layer. As such, the technique forms a bilevel structure using a single lithography step employing a two-tone (gray-scale) mask, or a sequence of exposures using two standard masks. This approach is aimed specifically at the patterning of dual damascene structures in low k organic polymer or amorphous carbon based films, which may be etched with high selectivity through a PPMS/PPMSO masking layer using an oxygen-based plasma. In such a pattern transfer step, the surface of the PPMS/PPMSO layer is converted into an SiO2 hard mask.

FIGS. 4A-4J depict the specific process steps for producing a dual damascene structure using a grey tone mask. FIG. 4A depicts a low k material layer deposited upon a substrate . In FIG. 4B, an etch stop layer is deposited upon the layer . The etch stop in this embodiment can be any form of etch stop that is applicable to the materials used in the structure. For example, a conventional silicon dioxide or silicon nitride etch stop can be used. In FIG. 4C, a second low k material layer is deposited over the etch stop layer . The final layer used to form the dual damascene structure is a layer of a radiation sensitive, silicon-based, CVD photoresist material such as PPMS that is deposited over the second low k material layer . See FIG. D.

As depicted in FIG. 4E, the combination of trench and contact vias are patterned in a single step using a grey tone mask (i.e., a mask having transparent portion , partially absorbing (grey) portion , and totally absorbing portion ). Alternatively, a sequence of two ordinary, opaque masks can be used to create a pattern in which some areas of the PPMS layer are totally exposed, some areas partially exposed, and some areas unexposed. Thus, the grey tone mask permits the UV radiation (arrows ) to fully expose region of the PPMS layer , partially expose region and not expose region . For negative tone applications, those areas of the dielectric stack intended to remain unetched are completely exposed, those areas to be removed in the upper layer of low k dielectric (the trench) are partially exposed, and those areas to be removed in both layers (i.e., the contact vias) remain unexposed.

Once the PPMS layer is exposed as described above, the PPMS development, trench, and via etch is then conducted in a single etch sequence, which is depicted in FIGS. 4F through 4I. In FIG. 4F, PPMS development is performed using a Cl2 or Cl2/HBr based plasma etch for a time sufficient to remove all of the completely unexposed PPMS and part of the partially exposed PPMS. The amount of PPMS left behind in the partially exposed area will depend on the relative amount of light (i.e., the percent transmission of the gray tone mask area ) and the total etch time (including overetch time) necessary to clear the unexposed regions of PPMS layer . The thickness of material remaining in the partially exposed area is thereby controlled by choice of initial film thickness, exposure level, and overetch time such that it may be removed in the same etch time (FIG. 4H below) necessary to remove a thin inorganic (oxide or nitride layer) etch stop layer between the two layers and of organic dielectric material.

In FIG. 4G, the etch gases are switched to an oxygen-based mixture (including pure oxygen, or oxygen with N2, CO2, CO, SO2, or other additives) so as to selectively and anisotropically etch through the second layer of the organic low k dielectric to form opening and stop on the thin inorganic etch stop layer . Under these etch conditions, the surface of the PPMS/PPMSO layer converts to a hard oxide etch mask, thereby protecting underlying material from etching.

In FIG. 4H, the etch gases are switched to generate a fluorine-based plasma. Typical etch gases include fluorocarbons, hydrofluorocarbons, SF6, NF3, their mixtures, or any other plasma etch chemistry known to selectively etch oxide over the underlying low k organic material. The duration of this etch must be sufficient to remove both the partially exposed (i.e., thin regions ) of PPMS/PPMSO layer and the thin inorganic etch stop layer , but not to remove all of the completely exposed portion of PPMS/PPMSO layer . In FIG. 4I, the etch gases are switched back to give an oxygen based plasma as in FIG. G. In this step the first layer of low k dielectric material is anisotropically etched down to the underlying substrate forming the contact via , while the now uncovered second layer is etched to form the trench (to be filled with metal to form the interconnect wire). Finally, it may be desirable (but not necessarily required to perform a final etch step (shown in FIG. 4J) using a fluorine-based plasma to remove the remaining layer of PPMS/PPMSO and the exposed area of the inorganic etch stop layer . This etch sequence, which may be performed in a single chamber or in separate chambers, completes the fabrication of a low k dual damascene structure which may then be filled with metal as described above with respect to FIG. 2 to form an interconnect structure.

The same structure may also be formed using a positive tone development process. This process would employ a mask structure essentially opposite to that of the negative tone process i.e., no exposure in region , partial exposure in region and full exposure of region . Again either a single gray level mask (i.e., one having transparent portion, partially absorbing (grey) portion, and totally sorbing (black portion) or a sequence of two ordinary masks is used to create a pattern in which some areas are totally exposed, some areas partially exposed, and some areas unexposed. For positive tone development, the areas in which the entire dielectric stack is to remain are unexposed, those areas to be removed in the upper layer of low k dielectric are partially exposed (this is the same as for the negative tone), and those areas to be removed in both layers are totally exposed.

Development of positive tone patterns is performed using either a wet etch process employing buffered oxide etch (BOE) solutions (e.g., a 7:1 BOE), as described in U.S. Pat. No. 5,439,780. Development time is controlled so that to remove all or essentially all of the PPMS/PPMSO in the totally exposed region, and some (the upper regions) of PPMS/PPMSO in the partially exposed regions, while leaving unexposed material essentially the same. The resulting bilevel pattern may then be transferred through the underlying layers using the steps depicted in FIGS. 4F-4J as described for the negative tone process.

It may also prove advantageous, for some applications, to add an additional step to the positive tone sequence between the PPMS mask etch step and the oxygen-based etch step in which the patterned PPMS mask is blanket exposed to UV radiation so as to uniformly oxidize it throughout its thickness. This is particularly useful if using positive tone development conditions in which some residue remains in the totally exposed regions. In such a case, it is necessary to add an additional step at the beginning of the dry etch sequence in which a fluorine-based plasma etch is applied long enough to clear any residue remaining on the surface of the totally exposed regions. Even a thin layer of residue, if allowed to remain, may act as a mask to prevent etching of the underlying organic low k material.

Although various embodiments which incorporate the teachings of the present invention have been shown and described in detail herein, those skilled in the art can readily devise many other varied embodiments that still incorporate these teachings.

BRIEF DESCRIPTION OF THE DRAWINGS

The teachings of the present invention can be readily understood by considering the following detailed description in conjunction with the accompanying drawings, in which:

FIGS. 1A-1H depict a sequence of process steps in accordance with the present invention for fabricating a dual damascene structure using PPMS;

FIG. 2 depicts a cross-sectional perspective view of a complete dual damascene structure fabricated in accordance with the present invention;

FIGS. 3A-3I depict a sequence of process steps in accordance with the present invention for fabricating a single damascene structure using PPMS; and

FIGS. 4A-4J depict a sequence of process steps for fabricating a dual damascene structure in accordance with an alternative embodiment of the invention.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a divisional of U.S. patent application Ser. No. 09/788,164, filed Feb. 16, 2001, now U.S. Pat. No. 6,514,857which is a divisional of application Ser. No. 09/017,350 filed Feb. 2,1998 now U.S. Pat. No. 6,204,168, issued Mar. 20, 2001, both of which are hereby incorporated by reference in their entirety.

CLAIMS

1. A damascene structure comprising: a first insulator layer; a layer of silicon-based photosensitive material deposited atop said first insulator layer, having an opening that defines a via in said layer of silicon-based photosensitive material; and a second insulator layer, deposited atop said layer of silicon-based photosensitive material, having a trench formed in said second insulator layer and intersecting said via, wherein said silicon-based photosensitive material is plasma polymerized methylsilane oxide (PPMSO).

2. The damascene structure of claim 1 wherein said first and second insulator layers are fabricated of a low dielectric constant material.

3. The damascene structure of claim 1 wherein said first and second insulator layers are fabricated of a material having a dielectric constant of less than 3.5.

4. The dual damascene structure of claim 1 wherein said first and second insulator layers are an amorphous fluorinated carbon material.

5. A damascene structure comprising: a first insulator layer; a layer of silicon-based photosensitive material deposited atop said first insulator layer, having an opening that defines a via in said layer of silicon-based photosensitive material; and a second insulator layer, deposited atop said layer of silicon-based photosensitive material, having a trench formed in said second insulator layer and intersecting said via, wherein the thicknesses of the first and second insulator layers are about two to seven times greater than the thickness of the layer of silicon-based photosensitive material.

6. The damascene structure of claim 5 wherein said silicon-based photosensitive material is plasma polymerized methylsilane oxide (PPMSO).

7. The damascene structure of claim 5 wherein said first and second insulator layers are fabricated of a low dielectric constant material.

8. The damascene structure of claim 5 wherein said first and second insulator layers are fabricated of a material having a dielectric constant of less than 3.5.

9. The dual damascene structure of claim 5 wherein said first and second insulator layers are an amorphous fluorinated carbon material.

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