In-plane switching liquid crystal display with an alignment free structure and method of using back exposure to form the same

ABSTRACT

An in-plane switching liquid crystal display with an alignment free structure. In each pixel area, at least one floating metal layer is disposed between two common electrodes and patterned on the same plane with the common electrodes, and at least one pixel electrode is disposed between the two common electrodes and covers the floating metal layer. The center of the pixel electrode is aligned to the center of the floating metal layer, and each interval between two adjacent common electrode and pixel electrode is fixed at a constant.

INFORMATION

DETAILED DESCRIPTION OF THE INVENTION

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention can be more fully understood by reading the subsequent detailed description in conjunction with the examples and references made to the accompanying drawings, wherein:

FIG. 1A is a sectional diagram showing the alignment of the LC molecules at an off state according to the conventional IPS-LCD.

FIG. 1B is a sectional diagram showing the alignment of the LC molecules at an on state according to the conventional IPS-LCD.

FIG. 2A is a sectional diagram showing the first type of the common electrode and the pixel electrode in the conventional comb-shaped electrode array.

FIG. 2B is a sectional diagram showing the second type of the common electrode and the pixel electrode in the conventional comb-shaped electrode array.

FIG. 2C is a sectional diagram showing the third type of the common electrode and the pixel electrode in the conventional comb-shaped electrode array.

FIG. 3 is a simulation result of the optical characteristics of opaque electrodes (Al) and transparent electrodes (ITO).

FIGS. 4A to C are the response characteristics of each electrode type corresponding to the first type (FIG. A), the second type (FIG. 2B) and the third type (FIG. C), respectively.

FIG. 5A is a top view showing an electrode array within a pixel area of an IPS-LCD according to the prior art.

FIG. 5B is a sectional view along line I—I of FIG. 5A showing the electrode array of the IPS-LCD according to the prior art.

FIG. 6 is a simulation result of the misalignment effect.

FIG. 7A is a sectional diagram showing an IPS-LCD according to the invention.

FIG. 7B is a top view showing an electrode array within a pixel area of an IPS-LCD according to the first embodiment of the present invention.

FIG. 7C is a sectional diagram along line II—II shown in FIG. B.

FIG. 8A is a top view showing a first step of forming the electrode array within a pixel area of the first embodiment.

FIG. 8B is a sectional view along line III—III shown in FIG. A.

FIG. 9A is a top view showing a second step of forming the electrode array within a pixel area of the first embodiment.

FIG. 9B is a sectional view along line III—III shown in FIG. A.

FIG. 10A is a top view showing a third step of forming the electrode array within a pixel area of the first embodiment.

FIG. 10B is a sectional view along line III—III shown in FIG. A.

FIG. 11A is a top view showing a fourth step of forming the electrode array within a pixel area of the first embodiment.

FIG. 11B is a sectional view along line III—III shown in FIG. A.

FIG. 12A is a top view showing a fifth step of forming the electrode array within a pixel area of the first embodiment.

FIG. 12B is a sectional view along line III—III shown in FIG. A.

FIG. 12C is a sectional view along line III—III shown in FIG. A.

FIG. 13A is a top view showing an electrode array within a pixel area of an IPS-LCD according to the second embodiment of the present invention.

FIG. 13B is a sectional diagram along line IV—IV shown in FIG. A.

FIG. 14A is a top view showing an electrode array within a pixel area of an IPS-LCD according to the third embodiment of the present invention.

FIG. 14B is a sectional diagram along line V—V shown in FIG. A.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

[First Embodiment]

FIG. 7A is a sectional diagram showing an IPS-LCD according to the invention. FIG. 7B is a top view showing an electrode array within a pixel area of an IPS-LCD according to the first embodiment of the present invention. FIG. 7C is a sectional diagram along line II—II shown in FIG. B.

As shown in FIG. 7A, an IPS-LCD comprises a pair of glass substrates and arranging in parallel and a liquid crystal layer formed in a space between the two glass substrates and . The bottom glass substrate serves as a TFT array substrate, on which gate lines, data lines, common electrodes, pixel electrodes are patterned. The upper substrate serves as a color filter substrate, on which a color filter film and a black matrix are patterned. Hereinafter, an electrode array within a pixel area on the bottom glass substrate of the IPS-LCD is described.

As shown in FIGS. 7B and 7C, on the bottom glass substrate , a plurality of gate lines extending along X-axis and a plurality of data lines extending along Y-axis forms a plurality of pixel areas arranged in a matrix form. Each of the pixel areas comprises a TFT structure , a comb-shaped common electrode structure, a floating metal pattern, and a comb-shaped pixel electrode structure. In this case, the comb-shaped common electrode structure comprises a common bus line disposed in X-axis and a plurality of common electrodes extending away from the common bus line along a first direction of Y-axis. Preferably, in one pixel area , there are three common electrodes . The comb-shape pixel electrode structure comprises a bar disposed near the TFT structure and at least one pixel electrode extending away from the bar along a second direction of Y-axis. Preferably, in one pixel area , there are two pixel electrodes . The two pixel electrodes are inter-digitated with the three common electrodes . In addition, the floating metal pattern comprises at least one strip-shaped floating metal layer disposed between two adjacent common electrodes and underneath the pixel electrode . Preferably, the floating metal pattern has two floating metal layers that extend along Y-axis and are patterned under the two pixel electrodes , respectively. Also, the floating metal layer is not connected to the common bus line .

As shown in FIG. 7C, the common electrodes and the floating metal layers are patterned on the same plane of the bottom glass substrate , an insulating layer is deposited to cover the common electrodes and the floating metal layers , and the pixel electrodes are patterned on the insulating layer . The common electrodes may be patterned on same plane with the common bus line , the data line or the gate line . The floating metal layers may be patterned on same plane with the common bus line , the data line or the gate line . Preferably, the common electrode is a non-transparent material, such as MoW or AlNd, the floating metal layer is a non-transparent material, such as MoW or AlNd, and the pixel electrode is a transparent material, such as ITO or IZO. Also, the width of the pixel electrode is larger than the width of the floating metal layer . Preferably, the center of the pixel electrode is aligned to the center of the floating metal layer , therefore the distance D1 is equal to D2.

Since the common electrodes and the floating metal layers are patterned on the same plane, the interval between the common electrode and the floating metal layer is easily controlled in the same step of photolithography process. Also, using back exposure from the back side of the bottom glass substrate to fine tune the pattern of pixel electrodes , the center of the pixel electrode can be aligned to the center of the floating metal layer . Therefore, the interval between the common electrode and the pixel electrode can be fixed at a constant distance to provide the same degree of in-plane electric field in each sub-pixel area. This results in the same capacitance and transmittance in each sub-pixel area to eliminate trip mura, shot mura and flicker found in the conventional IPS-LCD.

Hereinafter, a method of forming the electrode array shown in FIG. 7 is described.

FIG. 8A is a top view showing a first step of forming the electrode array within a pixel area of the first embodiment. FIG. 8B is a sectional view along line III—III shown in FIG. A. On the bottom glass substrate , a first metal layer of MoW or AlNd is deposited and patterned to become the gate lines , the comb-shape common electrode structure and the floating metal pattern . The gate line extends along X-axis. The comb-shaped common electrode structure comprises the common bus line disposed in X-axis and three common electrodes extending away from the common bus line along a first direction of Y-axis. The floating metal pattern comprises two floating metal layers disposed in Y-axis and inter-digitated with the three common electrodes .

FIG. 9A is a top view showing a second step of forming the electrode array within a pixel area of the first embodiment. FIG. 9B is a sectional view along line III—III shown in FIG. A. After completes the gate lines , the comb-shape common electrode structure and the floating metal pattern , an insulating layer , a first semiconductor layer and a second semiconductor layer are sequentially deposited. Preferably, the first semiconductor layer is amorphous silicon (a-Si:H), and the second semiconductor layer is n+-doped amorphous silicon (n+a-Si:H). Then, using photolithography and etching processes, the first semiconductor layer and the second semiconductor layer are patterned to be an island structure on a predetermined area (a gate electrode region) of the gate line .

FIG. 10A is a top view showing a third step of forming the electrode array within a pixel area of the first embodiment. FIG. 10B is a sectional view along line III—III shown in FIG. A. When a second metal layer is deposited on the bottom glass substrate , a part of the second metal layer is patterned to become the data lines extending along Y-axis. Thus, the gate lines and the data lines forms a plurality of pixel areas arranged in a matrix form. Also, another part of the second metal layer are patterned on the island structure , and then separated by an opening to serve as a source/drain electrode. Moreover, in the island structure , the second semiconductor layer is separated by an opening to serve as a source/drain diffusion region, and the first semiconductor layer serves as a channel region. Therefore, the gate electrode, the source/drain electrode, source/drain diffusion region and the channel region complete the TFT structure .

FIG. 11A is a top view showing a fourth step of forming the electrode array within a pixel area of the first embodiment. FIG. 11B is a sectional view along line III—III shown in FIG. 11A. A passivation layer of SiNx is deposited to cover the whole surface of the bottom glass substrate . Then, using photolithography and etching processes, a via hole is formed in the passivation layer to expose the drain region.

FIG. 12A is a top view showing a fifth step of forming the electrode array within a pixel area of the first embodiment. FIG. 12B is a sectional view along line III—III shown in FIG. A. FIG. 12C is a sectional view along line III—III shown in FIG. 12A. A transparent electrode layer, such as ITO or IZO, is deposited on the entire surface of the bottom glass substrate to fill the via hole . Then, using photolithography and etching processes, the transparent electrode layer is patterned to become a comb-shaped pixel electrode structure , which comprises a bar and two pixel electrodes . The two pixel electrodes that extend in a second Y-axis cover the two floating metal layer and are inter-digitated with the three common electrodes . For achieving a misalignment free structure, two steps of exposure are required and described as follows.

First, as shown in FIG. 12B, using a top exposure process from the top side of the bottom glass substrate with a mask, the transparent electrode layer is patterned to provide a plurality of predetermined pixel electrodes A over the floating metal layers , respectively. The top exposure process is employed to ensure that the predetermined pixel electrode A covers the floating metal layers , and the mask of a larger pattern size is used to roughly tune the relationship between the predetermined pixel electrode A and the floating metal layer . Therefore, the width of the predetermined pixel electrode A is more than 0.25 μm larger than the ideal size, and the distance D3 or D4 is larger than the ideal distance D1 or D2.

Next, as shown in FIG. 12C, using a back exposure process from the back side of the bottom glass substrate with the floating metal layers as a mask, the predetermined pixel electrodes A are patterned to become the pixel electrodes with an ideal size and perfect alignment to the floating metal layers . The back exposure process is employed to fine tune the relationship between the pixel electrode and the floating metal layer to ensure the distance D1 is equal to the distance D2.

[Second Embodiment]

FIG. 13A is a top view showing an electrode array within a pixel area of an IPS-LCD according to the second embodiment of the present invention. FIG. 13B is a sectional diagram along line IV—IV shown in FIG. A.

The second embodiment provides an IPS-LCD , in which the electrode array within the pixel area is almost the same as that described in the first embodiment. The only one difference is that the transparent electrode layer is patterned on the floating metal layers to serve as the pixel electrodes and also patterned on the common electrodes to serve as three transparent compensation electrodes . It is noticed that the transparent compensation electrodes is floated between two adjacent pixel electrodes , without overlapping the common bus line , the gate line and the data line .

The method of forming the electrode array of the IPS-LCD is almost the same as that described in the first embodiment. The difference is that the top exposure process on the transparent electrode layer extra provides a pattern of the transparent compensation electrodes , and then the back exposure process can use the common electrodes and the floating metal layers as the mask to fine tune the width of the transparent compensation electrodes and the width of pixel electrodes .

Since the transparent compensation electrodes and the pixel electrodes are patterned on the same plane, the interval between the transparent compensation electrode and the pixel electrode is easily controlled in the same step of photolithography process, resulting in the same capacitance and transmittance. This eliminates trip mura, shot mura and flicker found in the conventional IPS-LCD. In addition, the transparent compensation electrodes further improve the aperture ratio of the IPS-LCD .

[Third Embodiment]

FIG. 14A is a top view showing an electrode array within a pixel area of an IPS-LCD according to the third embodiment of the present invention. FIG. 14B is a sectional diagram along line V—V shown in FIG. A.

The third embodiment provides an IPS-LCD , in which the electrode array within the pixel area is almost the same as that described in the second embodiment. The differences are described as follows. First, the first metal layer is patterned as the gate line and the common bus line , and the second metal layer is patterned as the data line , the common electrode and the floating metal layer . Thus, a via hole is required to provide an electrically connection between the common bus line and the common electrode . Second, in addition to the pixel electrodes and transparent compensation electrodes , the transparent electrode layer is patterned on the common bus line to serve as an electrode plate . It is noticed that the electrode plate is floated without connecting the pixel electrodes and transparent compensation electrodes .

The method of forming the electrode array of the IPS-LCD is almost the same as that described in the second embodiment. The difference is that the top exposure process on the transparent electrode layer extra provides a pattern of the electrode plate , and then the back exposure process can use the common bus line , the common electrodes and the floating metal layers as the mask to fine tune the width of the electrode plate , the transparent compensation electrodes and the width of pixel electrodes .

Compared with the first embodiment and the second embodiment, the third embodiment provides the electrode plate over the common bus line to contribute a storage capacitor. Also, the combination of the electrode plate and the transparent compensation electrodes further improves the aperture ratio of the IPS-LCD .

Those skilled in the art will readily observe that numerous modifications and alterations of the device may be made while retaining the teaching of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.

CLAIMS

1. An in-plane switching liquid crystal display with an alignment free structure, comprising: a first substrate and a second substrate arranging in parallel to each other; a liquid crystal layer formed in a space between first substrate and the second substrate; a plurality of gate lines extending in a first direction and formed on the first substrate; a plurality of data lines extending in a second direction and formed on the first substrate, wherein the second direction is perpendicular to the first direction, and the data lines and gate lines constitute a plurality of pixel areas arranging in a matrix form; a plurality of TFT structures formed in the plurality of pixel areas respectively; a plurality of comb-shaped common electrode structures disposed in the plurality of pixel areas respectively on the first substrate, wherein each comb-shaped common electrode structure comprises a common bus line parallel to the gate line and at least two common electrodes extending in the second direction; a plurality of floating metal patterns disposed in the plurality of pixel areas respectively on the first substrate, wherein each floating metal pattern comprises at least one floating metal layer which extends in the second direction between the two common electrodes and is patterned on the same plane with the common electrodes; and a plurality of comb-shaped pixel electrode structures disposed in the plurality of pixel areas respectively on the first substrate, wherein each comb-shaped pixel electrode structure comprises a bar near the gate line and at least one pixel electrode which extends in the second direction between the two common electrodes and covers the floating metal layer; wherein, the center of the pixel electrode is aligned to the center of the floating metal layer, each interval between two adjacent common electrode and pixel electrode is fixed at a constant, and the width of the pixel electrode is larger than the width of the floating metal layer.

2. The in-plane switching liquid crystal display with an alignment free structure as claimed in claim 1, wherein the width of the pixel electrode is more than 0.25 μm larger than the width of the floating metal layer.

3. The in-plane switching liquid crystal display with an alignment free structure as claimed in claim 1, further comprising an insulating layer disposed between the pixel electrode and the floating metal layer.

4. The in-plane switching liquid crystal display with an alignment free structure as claimed in claim 1, wherein the pixel electrode is made of a transparent conductive material.

5. The in-plane switching liquid crystal display with an alignment free structure as claimed in claim 1, wherein the common electrode and the floating metal layer are made of a non-transparent conductive material.

6. The in-plane switching liquid crystal display with an alignment free structure as claimed in claim 1, wherein the common electrode and the floating metal layer are patterned on the same plane with the common bus line and the gate line.

7. A method of forming an in-plane switching liquid crystal display with an alignment free structure, comprising steps of: providing a substrate; forming a plurality of gate lines extending in a first direction on the substrate; forming a comb-shaped common electrode structure within each predetermined pixel area, wherein the comb-shaped common electrode structure comprises a common bus line parallel to the gate line and at least two common electrodes extending in a second direction that is perpendicular to the first direction; forming a floating metal pattern within each predetermined pixel area, wherein the floating metal pattern comprises at least one floating metal layer extending in the second direction between the two common electrodes; forming an insulating layer to cover the gate lines, the comb-shaped common electrode structure, the floating metal pattern and substrate; forming a plurality of data lines extending in the second direction on the insulating layer, wherein the data lines and the gate lines constitute a plurality of pixel areas arranging in a matrix form; forming a passivation layer on the entire surface of the substrate; forming a comb-shaped pixel electrode structure disposed in each pixel area on the passivation layer, wherein the comb-shaped pixel electrode structure comprises a bar near the gate line and at least one pixel electrode that extends in the second direction between the two common electrodes and covers the floating metal layer; wherein the center of the pixel electrode is aligned to the center of the floating metal layer, and each interval between two adjacent common electrode and pixel electrode is fixed at a constant.

8. The method of forming an in-plane switching liquid crystal display with an alignment free structure as claimed in claim 7, further comprising steps of forming a TFT structure within each pixel area: before the formation of the data line, forming an island structure on a predetermined area of the gate line, wherein the island structure is stacked by a first semiconductor layer and a second semiconductor layer; at the same time when forming the data line, forming a source/drain electrode layer on the island structure; and patterning the island structure to form the first semiconductor layer as a source/drain diffusion layer.

9. The method of forming an in-plane switching liquid crystal display with an alignment free structure as claimed in claim 8, further comprising steps of: forming a via hole in the passivation layer to expose the drain electrode layer; and forming the bar of the comb-shaped pixel electrode structure to electrically connecting the drain electrode layer through the via hole.

10. The method of forming an in-plane switching liquid crystal display with an alignment free structure as claimed in claim 7, wherein the width of the pixel electrode is larger than the width of the floating metal layer.

11. The method of forming an in-plane switching liquid crystal display with an alignment free structure as claimed in claim 10, wherein the width of the pixel electrode is more than 0.25 μm larger than the width of the floating metal layer.

12. The method of forming an in-plane switching liquid crystal display with an alignment free structure as claimed in claim 7, wherein the pixel electrode is made of a transparent conductive material.

13. The method of forming an in-plane switching liquid crystal display with an alignment free structure as claimed in claim 7, wherein the common electrode and the floating metal layer are made of a non-transparent conductive material.

14. The method of forming an in-plane switching liquid crystal display with an alignment free structure as claimed in claim 7, wherein the common electrode and the floating metal layer are patterned on the same plane with the common bus line and the gate line.

15. An in-plane switching liquid crystal display with an alignment free structure, comprising: a first substrate and a second substrate arranging in parallel to each other; a liquid crystal layer formed in a space between first substrate and the second substrate; a plurality of gate lines extending in a first direction and formed on the first substrate; a plurality of data lines extending in a second direction and formed on the first substrate, wherein the second direction is perpendicular to the first direction, and the data lines and gate lines constitute a plurality of pixel areas arranging in a matrix form; a plurality of TFT structures formed in the plurality of pixel areas respectively; a plurality of comb-shaped common electrode structures disposed in the plurality of pixel areas respectively on the first substrate, wherein each comb-shaped common electrode structure comprises a common bus line parallel to the gate line and at least two common electrodes extending in the second direction; a plurality of floating metal patterns disposed in the plurality of pixel areas respectively on the first substrate, wherein each floating metal pattern comprises at least one floating metal layer which extends in the second direction between the two common electrodes and is patterned on the same plane with the common electrodes; a plurality of comb-shaped pixel electrode structures disposed in the plurality of pixel areas respectively on the first substrate, wherein each comb-shaped pixel electrode structure comprises a bar near the gate line and at least one pixel electrode which extends in the second direction between the two common electrodes and covers the floating metal layer; and a plurality of transparent compensation electrodes disposed in the plurality of pixel areas respectively on the first substrate, wherein each pixel area comprises at least two transparent compensation electrodes which extends in the second direction and covers the two common electrodes; wherein, the center of the pixel electrode is aligned to the center of the floating metal layer, the center of the transparent compensation electrode is aligned to the center of the common electrode, each interval between the transparent compensation electrode and the pixel electrode is fixed at a constant, and the width of the pixel electrode is larger than the width of the floating metal layer.

16. The in-plane switching liquid crystal display with an alignment free structure as claimed in claim 15, wherein the width of the pixel electrode is more than 0.25 μm larger than the width of the floating metal layer.

17. The in-plane switching liquid crystal display with an alignment free structure as claimed in claim 15, further comprising an insulating layer disposed between the pixel electrode and the floating metal layer.

18. The in-plane switching liquid crystal display with an alignment free structure as claimed in claim 15, wherein the pixel electrode and the transparent compensation electrode are made of a transparent conductive material.

19. The in-plane switching liquid crystal display with an alignment free structure as claimed in claim 15, wherein the common electrode and the floating metal layer are made of a non-transparent conductive material.

20. The in-plane switching liquid crystal display with an alignment free structure as claimed in claim 15, wherein the common electrode and the floating metal layer are patterned on the same plane with the common bus line and the gate line.

21. The in-plane switching liquid crystal display with an alignment free structure as claimed in claim 15, wherein the transparent compensation electrode and the pixel electrode are patterned on the same plane.

22. An in-plane switching liquid crystal display with an alignment free structure, comprising: a first substrate and a second substrate arranging in parallel to each other; a liquid crystal layer formed in a space between first substrate and the second substrate; a plurality of gate lines extending in a first direction and formed on the first substrate; a plurality of data lines extending in a second direction and formed on the first substrate, wherein the second direction is perpendicular to the first direction, and the data lines and gate lines constitute a plurality of pixel areas arranging in a matrix form; a plurality of TFT structures formed in the plurality of pixel areas respectively; a plurality of comb-shaped common electrode structures disposed in the plurality of pixel areas respectively on the first substrate, wherein each comb-shaped common electrode structure comprises a common bus line parallel to the gate line and at least two common electrodes extending in the second direction; a plurality of floating metal patterns disposed in the plurality of pixel areas respectively on the first substrate, wherein each floating metal pattern comprises at least one floating metal layer which extends in the second direction between the two common electrodes and is patterned on the same plane with the common electrodes; a plurality of comb-shaped pixel electrode structures disposed in the plurality of pixel areas respectively on the first substrate, wherein each comb-shaped pixel electrode structure comprises a bar near the gate line and at least one pixel electrode which extends in the second direction between the two common electrodes and covers the floating metal layer; a plurality of transparent compensation electrodes disposed in the plurality of pixel areas respectively on the first substrate, wherein each pixel area comprises at least two transparent compensation electrodes which extends in the second direction and covers the two common electrodes; and a plurality of electrode plates disposed in the plurality of pixel areas respectively on the first substrate, wherein each pixel area comprises at one electrode plate which extends in the first direction and covers the common bus line without connecting the transparent compensation electrode and the pixel electrode; wherein, the center of the pixel electrode is aligned to the center of the floating metal layer, the center of the transparent compensation electrode is aligned to the center of the common electrode, each interval between the transparent compensation electrode and the pixel electrode is fixed at a constant, and the width of the pixel electrode is larger than the width of the floating metal layer.

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